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yobo体育app:8月17日(周五)张立夫客座教授颁证仪式及学术报告

发布时间:2012-08-16 
   专用集成电路与系统国家重点实验室聘请中芯国际的张立夫博士为实验室客座教授,将于2012年8月17日(周五)上午10:30在张江校区微电子楼369会议室举行颁证仪式,仪式结束后我们将邀请张立夫博士做特邀报告,详情见下邮件。
 
欢迎各位老师参加。
 

Speech: New Trends of Foundry’s Design Enablement at 20nm Process Technologies

 

张立夫 博士 技术研发中心处长,中芯国际集成电路制造有限公司

1996年获得美国普渡大学博士学位。从获得博士学位起,在美国硅谷和中国从事半导体研究和开发工作超过十六年。研究领域包括半导体物理,计算机辅助设计,超大集成电路逻辑和系统芯片设计方法学和物理验证技术,工艺模型及仿真技术,可制造性设计技术,可靠性工程,设计规则研究等多方面。曾在美国硅谷高科技公司担任不同技术管理职位,于2007年加入中芯国际集成电路制造有限公司研发中心担任处长。张博士从事半导体设计方法学研究和应用,特别是3D电感参数模型和提取技术,成功的应用在许多130纳米和90纳米高速逻辑和混合信号设计当中。这项工作在2001年获得了射频信号设计杂志最佳EDA解决方案奖项。作为电性可制造设计的领袖发起人之一,张博士于2004年创立了电性方面可制造设计的重要的理论基础和方法,这些发表于Clear Shape公司的专利被多次广泛的采用。直到今天这些技术仍被大多数高科技半导体工厂和设计公司应用在45纳米以下工艺技术中。在中国的半导体技术行业中,作为可制造技术和设计技术的创始人之一,开创了设计和制造合作优化技术的先河。本人曾在国际期刊和技术会议上发表了超过50篇技术论文,多次获得美国专利。除了半导体行业的工作,本人也在2003年开始担任圣塔克拉拉大学的兼职教授,并在2011年开始担任中国科学院微电子研究所的客座教授。张博士是IEEE的资深会员。

 

 Dr. Li-Fu Chang obtained Ph.D. Degree from Purdue University in 1996. Since then, he worked on semiconductor research and development at the Silicon Valley, California, USA, and China. His work areas include semiconductor physics, technology computer aided design, VLSI/Logic/SOC design methodologies, VLSI/Logic/SOC physical verification, process modeling and simulation, design for manufacturability (DFM), reliability engineering, design rules, and other areas of technologies. He held several technical and management position at companies in Silicon Valley, and started to serve as Director of Technology Research and Development at SMIC since 2007. Dr. Changs work on design methodologies, specifically in three-dimensional on-chip inductance modeling and extraction, enabled many successful high-speed logic and mixed-signal designs at 0.13um and 90nm. The work was awarded the best EDA Solutions from RF Design Magazine in 2001. He has also initiated and built the significant foundation of Electrical DFM since 2004 through several widely adopted US patents he published at Clear Shape Technologies.  The technologies are being used by most of the advanced semiconductor foundry and design companies for 45nm and more advanced technologies today. He also initiated, built, and runs the DFM and other Design and Manufacturing Co-Optimization technologies in the Chinese semiconductor industry. Dr. Chang has published more than 50 technical papers in international journals and conferences. He has held multiple US patents. Besides industry work, he has been an Adjunct Professor of Santa Clara University since 2003, and a Visiting Professor of Institute of Microelectronics, Chinese Academy if Sciences since 2011. He is an IEEE Senior Member.

 



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